Speed and energy analysis of digital interconnections: comparison of on-chip, off-chip, and free-space technologies.
نویسندگان
چکیده
We model and compare on-chip (up to wafer scale) and off-chip(multichip module) high-speed electrical interconnections withfree-space optical interconnections in terms of speed performance andenergy requirements for digital transmission in large-scalesystems. For all technologies the interconnections are firstmodeled and optimized for minimum delay as functions of theinterconnection length for both one-to-one and fan-outconnections. Then energy requirements are derived as functions ofthe interconnection length. Free-space optical interconnectionsthat use multiple-quantum-well modulators or vertical-cavitysurface-emitting lasers as transmitters are shown to offer aspeed-energy product advantage as high as 30 over that of the electrical interconnection technologies.
منابع مشابه
Design and Implementation of a High Speed Systolic Serial Multiplier and Squarer for Long Unsigned Integer Using VHDL
A systolic serial multiplier for unsigned numbers is presented which operates without zero words inserted between successive data words, outputs the full product and has only one clock cycle latency. 
The multiplier is based on a modified serial/parallel scheme with two adjacent multiplier cells. Systolic concept is a well-known means of intensive computational task through replication of fu...
متن کاملChip Formation Process using Finite Element Simulation “Influence of Cutting Speed Variation”
The main aim of this paper is to study the material removal phenomenon using the finite element method (FEM) analysis for orthogonal cutting, and the impact of cutting speed variation on the chip formation, stress and plastic deformation. We have explored different constitutive models describing the tool-workpiece interaction. The Johnson-Cook constitutive model with damage initiation and damag...
متن کاملDesign and Implementation of a High Speed Systolic Serial Multiplier and Squarer for Long Unsigned Integer Using VHDL
A systolic serial multiplier for unsigned numbers is presented which operates without zero words inserted between successive data words, outputs the full product and has only one clock cycle latency. The multiplier is based on a modified serial/parallel scheme with two adjacent multiplier cells. Systolic concept is a well-known means of intensive computational task through replication of func...
متن کاملCongestion estimation of router input ports in Network-on-Chip for efficient virtual allocation
Effective and congestion-aware routing is vital to the performance of network-on-chip. The efficient routing algorithm undoubtedly relies on the considered selection strategy. If the routing function returns a number of more than one permissible output ports, a selection function is exploited to choose the best output port to reduce packets latency. In this paper, we introduce a new selection s...
متن کاملOptimization of Material Removal Rate in Electrical Discharge Machining Alloy on DIN1.2080 with the Neural Network and Genetic Algorithm
Electrical discharge machining process is one of the most Applicable methods in Non-traditional machining for Machining chip in Conduct electricity Piece that reaching to the Pieces that have good quality and high rate of machining chip is very important. Due to the rapid and widespread use of alloy DIN1.2080 in different industry such as Molding, lathe tools, reamer, broaching, cutting guillot...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
- Applied optics
دوره 37 2 شماره
صفحات -
تاریخ انتشار 1998